A heterojunction field effect transistor (HFET), such as a high election mobility transistor (HEMT), is an important device for the applications in wireless communications, such as low noise amplifiers for RF (radio frequency) signals and switch elements in integrated wireless circuits.
FIG. 1A is a cross section view for a conventional HFET device, which comprises sequentially: a substrate 101, a channel layer 102, a spacing layer 103, a carrier supply layer 104, a Schottky layer 105, a first etching stop layer 106, and a first n type doped layer 107, which is usually heavily doped for facilitating ohmic contacts. The substrate 101 is a GaAs substrate. The channel layer 102 is formed epitaxially on the substrate 101, which can be a GaAs layer or an InGaAs layer. On top of the channel layer 102 are the modulation doped layers, comprising sequentially the spacing layer 103, the carrier supply layer 104, and the Schottky layer 105. The modulation doped layers are generally made of a medium energy gap material, preferably AlxGa1-xAs layers with Al contents around 0.3. The spacing layer 103 and the Schottky layer 105 are generally undoped AlGaAs, while the carrier supply layer 104 is a doped AlGaAs layer, from which carriers can be transferred into the channel layer 102 and controlled by a gate voltage. On the Schottky layer 105 are the first etching stop layer 106 and the first n type doped layer 107 formed thereon. The first etching stop layer 106 is used for fabricating a gate groove so that the gate electrode 108 can make a Schottky contact with the Schottky layer 105. Because the etchant for selective etching the Schottky layer 105 and the first n type doped layer 107 is not usually available, a first etching stop layer 106 inserted between the Schottky layer 105 and the first n type doped layer 107 is necessary. Therefore, the first etching stop layer 106 must be made of a material that has a high etching selectivity with the Schottky layer 105 and the first n type doped layer 107, such that the etching depth can be precisely controlled. Finally, metal layers acting as the source electrode 109 and the drain electrode 110 are deposited on the first n type doped layer 107 to form ohmic contacts. In order to improve the device performance, especially the break down voltage between the gate electrode and the drain electrode, a dual-gate-groove structure has been developed, as shown in FIG. 1B. The dual-gate-groove structure is formed by a wider indentation located on a narrower indentation. To form the dual-gate-groove structure, a second etching stop layer 106a, and a second n type doped layer 107a thereon, must be inserted between the first etching stop layer 106 and the Schottky layer 105. This kind of structure has been widely used in the past. The advantage of this structure is that a superior Schottky contact characteristics can be obtained since the Schottky layer 105 is made of a medium energy gap material. However, this structure also has a drawback. When the device is at on state, it will have a large on-state resistance, Ron, due to the large difference in energy gap between the Schottky layer 105 and the first n type doped layer 107.
To overcome this drawback, an improved HFET structure had been developed, which is shown in FIG. 2A. Comparing with the conventional HFET shown in FIG. 1A, the main difference is that a tunneling layer 211 is inserted between the Schottky layer 205 and the first etching stop layer 206, as shown in FIG. 2A. For a dual-gate-groove structure, the tunneling layer 211 should be inserted between the second etching stop layer 206a and the Schottky layer 205, as shown in FIG. 2B. The tunneling layer 211 is made of a lower energy gap material so that the contact resistance between the source electrode 209 (or the drain electrode 210) and the channel layer 202 can be reduced, such that the on-state resistance, Ron, of the device can also be reduced. However, in this structure, the gate electrode 208 has to contact directly with the tunneling layer 211. Because the tunneling layer 211 is made of a lower energy gap material, the Schottky breakdown voltage would be decreased, which limits the device applications considerably. Furthermore, the surface state of low energy gap semiconductor is relatively unstable so that the fabrication process for the gate electrode easily become unstable and the reliability of the device is then reduced.
In view of these facts and for overcoming the drawback stated above, the present invention provides an improved HFET structure and a fabrication method thereof. The devices according to the present invention not only have a low resistance at on state, but also have a high breakdown voltage of Schottky contact so that its reliability is largely improved. Furthermore, the fabrication process for the devices has a high stability.